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ADL5315
I LIM =
The VSET control is intended primarily to provide a dc bias
voltage for the mirror input, but it is also well behaved in the
presence of the V SET transients. The rise time of V INPT is largely
independent of input current because the mirror is capable of
sourcing large currents to pull up the INPT pin. The fall time,
however, is inversely proportional to I INPT because only I INPT is
available to discharge the input compensation capacitor and
other parasitics (see Figure 11). The mirror output current can
vary significantly from zero to several milliamps until V INPT is
fully settled.
NOISE PERFORMANCE
The noise performance for the ADL5315, defined as the rms
noise current as a fraction of the output dc current, generally
improves with increasing signal current. This partially results
from the relationship between the quiescent collector current
and the shot noise in the bipolar transistors. At lower signal
current levels, the noise contribution from the JFET amplifier
and other voltage noise sources appearing at INPT contribute
significantly to the current noise. Filtering noise at VSET,
whether provided by SREF or generated externally, as well as
selecting optimal external compensation components on INPT,
minimizes the amount of current noise at IOUT generated by
the voltage noise at INPT.
MIRROR RESPONSE TIME
The response time of I OUT to changes in I INPT is fundamentally a
function of input current, with small-signal bandwidth increasing
roughly in proportion to I INPT (see Figure 10). The value of the
external compensating capacitor on INPT strongly affects the
I OUT response time (as well as the V SET to V INPT fall time, as noted
in the Bias Control Interface section), although the value must
be chosen to maintain stability and prevent noise peaking.
INPUT CURRENT LIMITING
The ADL5315 provides a resistor-programmable input current
limit with a fixed maximum of 16 mA for the RLIM pin tied to
VPOS. The fixed maximum provides input short-circuit protection
to ground. The current limit is defined as the current that forces
V INPT to 0 V (when using a current source on the INPT pin).
Resistor R LIM between the VPOS and RLIM pins controls the
current limit according to
48 V
R LIM + 3 kΩ
over an R LIM range of 0 to 45 kΩ, corresponding to 16 mA down
to 1 mA. Larger values of R LIM can be used for currents below
1 mA (down to approximately 250 μA) with some degradation
in accuracy. See Figure 14 for more performance detail.
Rev. 0 | Page 10 of 20
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